SAK-XC161CJ-16F40F SAK-XC161CJ TQFP-144 new original

SAK-XC161CJ-16F40F SAK-XC161CJ TQFP-144 new original
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SAK-XC161CJ-16F40F SAK-XC161CJ TQFP-144 new original

  • Model: IC095
  • Shipping Weight: 0.15kg
  • Units in Stock: 1000

Price:   $19.89

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INFINEON  XC161CJ16F40FBBKXUMA1  16 Bit Microcontroller, High Performance, XC166, 40 MHz, 128 KB, 8 KB, 144, TQFP. SAK-XC161CJ-16F40F can by use in MB SD C4,Automotive,Automation & Process Control,Communications & Networking,RF Communications..

SAK-XC161CJ-16F40F SAK-XC161CJ TQFP-144 new original

SAK-XC161CJ-16F40F Product Overview

The SAK-XC161CJ-16F40F BB is a high-performance 16-bit single-chip CMOS Microcontroller. This device extend the functionality and performance of the C166 family in terms of instructions (MAC unit), peripherals and speed. They combine high CPU performance with high peripheral functionality and enhanced IO-capabilities. They also provide clock generation via PLL and various on-chip memory modules such as program Flash, program RAM and data RAM. The architecture of the XC161 combines advantages of RISC, CISC and DSP processors with an advanced peripheral subsystem in a very well-balanced way. In addition, the on-chip memory blocks allow the design of compact systems-on-silicon with maximum performance.

High performance 16-bit CPU with 5-stage pipeline
25ns Instruction cycle time at 40MHz CPU clock (single-cycle execution)
16 Priority-level interrupt system with 73 Sources, sample-rate down to 50ns
8-channel interrupt-driven single-cycle data transfer facilities via peripheral event controller
24-bit Pointers cover total address space
Clock Generation via on-chip PLL
2kB On-chip dual-port RAM (DPRAM)
4kB On-chip data SRAM (DSRAM)
2kB On-chip Program/Data SRAM (PSRAM)
128kB On-chip Program memory (flash memory)
12-channel ADC with programmable resolution (10-bit or 8-bit)
Two 16-channel general purpose capture/compare units (32 input/output pins)
Multi-functional general purpose timer unit with 5 timers
Two Synchronous/Asynchronous serial channels (USARTs)
Two high speed synchronous serial channels
On-chip TwinCAN interface (Rev. 2.0B active)
Serial data link module (SDLM), compliant with J1850, supporting Class 2
IIC bus interface (10-bit addressing, 400kbps) with 3 channels (multiplexed)
On-chip real-time clock, driven by dedicated oscillator
Idle, sleep and power down modes with flexible power management


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